L&T Technology is hiring for STA Engineers / Physical Design Engineers with 4-8 years of experience.

Job Location :
Bangalore

Detailed JD is below :
:

- Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs.

- Can work closely with FE team for constraints development and constraints cleanup.

- Work with partitions/block owner to give timing ECO for timing closure.

- Knowledge of advanced timing closure techniques and methodology

- Knowledge of industry stanrd tools from Synops or Cadence.

- Worked on DSM technologies, tsmc 5nm and below experience preferred.

- Minimum 4+ of relevant experience

- Good scripting and communication skills